搜索资源列表
video_compression_systems
- 根据jpeg标准用verilog语言编写的视频编码器，此编码器可作为一个通用IP使用，完成数字音频/视频的编解码功能-under jpeg standards with the Verilog language video encoder, this encoder can be used as a common IP use, complete digital audio / video codec
WM8731
- 高品质音频编解码器WM8731的Verilog使用程序。-high-quality audio codec WM8731 Verilog procedures.
mp3
- MP3音频解码的verilog源代码，已经验证过的，可综合-MP3 Audio coding
DE2_115_Audio
- FPGA开发板所带的示例程序，实现音频信号的采集，处理和输出，用verilog语言编写，可直接编译下载，非常有学习和参考价值-FPGA board comes with sample programs, audio signal acquisition, processing, and output, using Verilog language can be compiled directly download very learning and reference value! ! !
DE2-115_labs_vhdl
- 高品质音频编解码器WM8731的Verilog使用程序-High-quality audio codec WM8731 of Verilog using the program
DE2_SD_Card_Audio
- 基于ALTERA公司DE2的读卡器驱动及音频处理（verilog）-ALTERA DE2 board, card reader drive and audio processing (verilog)
ANC_LMS
- verilog描述的基于LMS的自适应噪声消除器ANC算法。用于数字音频处理。-The verilog Descr iption LMS-based adaptive noise canceller ANC algorithm. For digital audio processing.
AD_FIFO
- 简单的Verilog程序，针对音频实验板的AD到DA调通试验，下载执行前请按照自己试验环境更改设置-Simple Verilog program for test the AD to DA loop of universal audio test platform. Please configure it according to the test environment before download and implement the program to FPGA
DE2_115_Audio
- DE2-115开发板音频录放verilog HDL代码-DE2-115 development board audio recorders verilog HDL code
Spdif_out
- S/PDIF Audio output example for FPGA (in Verilog)
de2_audio_if
- audio codec wm8731 wolfsom in verilog. custom project
MUSIC
- 基于Verilog HDL制作的音频程序、-Verilog HDL-based audio programs produced,
Cyclone4_SD_Card_Audio_Player
- 基于cyclone4 FPGA芯片的音频播放器完成项目工程，包括SOPC项目代码，以及SD卡读取模块Verilog IP，以及完整的Q2下项目工程。-Cyclone4 FPGA chip based audio player to complete the project works, including the SOPC project code, and SD card reader module IP, as well as complete Q2 next project.
SOUND_PLAY6
- WM8731芯片的音效处理verilog代码， WM8731芯片是音频ADC\DAC芯片-WM8731 audio processing chip verilog code, WM8731 chip audio ADC \ DAC chip
I2S
- 本代码提供一种音频I2S读取数据的verilog代码，并且向fifo写入-This code provides an I2S audio data is read verilog code, and write to the fifo
audioloopback
- Verilog program for running a audio loopback system for AC97 codec.
170511-122356
- picture zip linux verilog
基于STEP-FPGA板的简易数字音频播放器
- 基于FPGA的数字音频播放器，将mp3文件通过fpga并外接扬声器进行播放(FPGA based digital audio player, the MP3 file is played through the FPGA and out of the speaker.)
i2s
- 用Verilog实现的i2s功能，支持24bit的左右声道 接收和发送。左对齐，延迟1拍。(I2S module, Verilog I2S, up to 24-Bit Data Data Valid on Rising Edge of SCLK)
Audio_whistle_suppressor
- 探讨了一种数字移频法啸叫检测与抑制音频功率放大实验测试系统设计方案，用来实现带啸叫检测与抑制音频功率放大．系统以 FPGA 为控制核心(This paper has designed a testing system for an audio power amplifier with howling detection and suppression which is used to achieve howling detection and suppression audio power am